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Development of SoPC architecture for FPGA-based mobile robot
In the context of the rapid progress in the field of mobile robotics, the need for efficient systems with high embedded processing power has emerged as a fundamental challenge. This paper addresses this issue by using FPGAs, devices underutilized in the literature for the development of architectures with H/S (hardware/software) co-design in mobile robots. The suitability of FPGAs for this purpose is highlighted, as they offer a balance between efficiency and low power consumption. The paper focuses on the implementation of a SoPC (System on Programmable Chip) based architecture designed specifically for an FPGA-based differential drive mobile robot. The most relevant aspects of the design are presented by means of diagrams illustrating the layout and interconnection of key components. The practical implementation of this architecture was carried out on a mobile robot whose processing unit is a DE0 Nano development board equipped with a Cyclone® IV FPGA. The results obtained reveal a successful behavior of the architecture in terms of interfacing with sensors, actuators, and data processing. The efficiency of the design is reflected in the balanced occupation of resources in the FPGA, highlighting the 67% of logical area still available for future implementations of modules for hardware acceleration. This paper demonstrates the feasibility and efficiency of FPGAs in the design of advanced architectures for mobile robots, providing a solid foundation for future research and development in the field of robotics.